Custom Chip Registers
Custom chip registers are used for interacting with the custom chips on the Amiga. Some registers are read-only, others are write-only; care must be taken to respect. Undefined bits should always be cleared when writing, and other bits should be left in their current state to avoid upsetting other functions.
You will notice that all registers are contained within the 4KB address range $DFFxxx. Often the addresses are documented as a 12-bit address, in which case the $DFF prefix is assumed.
Unless otherwise stated, all accesses are 16-bit words.
Address | Register | Read/Write | Chip | OCS | ECS | AGA | Function |
---|---|---|---|---|---|---|---|
DFF09E | ADKCON | W | Paula | ✓ | ✓ | ✓ | Audio, disk, control write |
DFF010 | ADKCONR | R | Paula | ✓ | ✓ | ✓ | Audio, disk, control read |
DFF0A0 | AUD0LCH | W | Agnus | ✓ | ✓* | ✓ | Audio channel 0 location (high 3 bits, 5 bits if ECS) |
DFF0A2 | AUD0LCL | W | Agnus | ✓ | ✓ | ✓ | Audio channel 0 location (low 15 bits) |
DFF0A4 | AUD0LEN | W | Paula | ✓ | ✓ | ✓ | Audio channel 0 length |
DFF0A6 | AUD0PER | W | Paula | ✓ | ✓* | ✓ | Audio channel 0 period |
DFF0A8 | AUD0VOL | W | Paula | ✓ | ✓ | ✓ | Audio channel 0 volume |
DFF0AA | AUD0DAT | W | Paula | ✓ | ✓ | ✓ | Audio channel 0 data |
DFF0B0 - DFF0DA | Repeat of Channel 0 audio registers, DFF0Bx for channel 1, DFF0Cx for channel 2, DFF0Dx for channel 3 |
* Changes were made starting with this revision of chip. See Hardware Reference Manual for details.
A full list of custom chipset registers can be found at http://coppershade.org/articles/Code/Reference/Custom_Chip_Register_List/